MC74HC73A Series

Dual JK Flip Flop with Reset

Catalog

Dual JK Flip Flop with Reset

Part	Mounting Type	Max Propagation Delay @ V, Max CL	Number of Bits per Element	Function	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Clock Frequency	Type	Trigger Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Elements	Input Capacitance	Output Type	Current - Quiescent (Iq)	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [x]	Package / Case [y]	Package / Case	Supplier Device Package	Package / Case [custom]	Package / Case [custom]
ON Semiconductor MC74HC73ADR2G	Surface Mount	21 ns	1	Reset	5.2 mA	5.2 mA	35 MHz	JK Type	Negative Edge	2 V	6 V	2	10 pF	Complementary	4 çA	125 °C	-55 °C	0.154 in	3.9 mm	14-SOIC
ON Semiconductor MC74HC73ADTR2G	Surface Mount	21 ns	1	Reset	5.2 mA	5.2 mA	35 MHz	JK Type	Negative Edge	2 V	6 V	2	10 pF	Complementary	4 çA	125 °C	-55 °C			14-TSSOP	14-TSSOP	0.173 "	4.4 mm

Catalog

Dual JK Flip Flop with Reset

Key Features

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the JEDEC Standard No. 7.0 A Requirements

• Chip Complexity: 92 FETs or 23 Equivalent Gates

• These are PbFree Devices

Description

High Performance Silicon Gate CMOS. The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LSTTL outputs. Each flip flop is negative edge clocked and has an active low asynchronous reset. The MC74HC73A is identical in function to the HC107, but has a different pinout.