Catalog
1080p oLDI Dual FPD-Link III Deserializer
Key Features
• Qualified for automotive applicationsAEC-Q100 qualified with the following results:Device temperature grade 2: –40°C to +105°C ambient operating temperatureSupports pixel clock frequency up to 192 MHz for up to 2K (2048x1080) resolutions with 24-bit color depth1-Lane or 2-lane FPD-Link III interface with de-skew capabilitySingle or dual OpenLDI (LVDS) transmitterSingle channel: up to 96-MHz pixel clockDual channel: up to 192-MHz pixel clockConfigurable 18-Bit RGB or 24-bit RGBFunctional Safety-CapableDocumentation available to aid ISO 26262 system designFour high-speed GPIOs (up to 2 Mbps each)Adaptive receive equalizationCompensates for channel insertion loss of up to –15.5 dB at 1.48 GHz and -9 dB at 1.68 GHzProvides automatic temperature and cable aging compensationSPI control interfaces up to 3.3 MbpsI2C (Controller/Target) With 1-Mbps fast-mode plusImage enhancement (white balance and dithering)Supports 7.1 multiple I2S (4 data) channelsQualified for automotive applicationsAEC-Q100 qualified with the following results:Device temperature grade 2: –40°C to +105°C ambient operating temperatureSupports pixel clock frequency up to 192 MHz for up to 2K (2048x1080) resolutions with 24-bit color depth1-Lane or 2-lane FPD-Link III interface with de-skew capabilitySingle or dual OpenLDI (LVDS) transmitterSingle channel: up to 96-MHz pixel clockDual channel: up to 192-MHz pixel clockConfigurable 18-Bit RGB or 24-bit RGBFunctional Safety-CapableDocumentation available to aid ISO 26262 system designFour high-speed GPIOs (up to 2 Mbps each)Adaptive receive equalizationCompensates for channel insertion loss of up to –15.5 dB at 1.48 GHz and -9 dB at 1.68 GHzProvides automatic temperature and cable aging compensationSPI control interfaces up to 3.3 MbpsI2C (Controller/Target) With 1-Mbps fast-mode plusImage enhancement (white balance and dithering)Supports 7.1 multiple I2S (4 data) channels
Description
AI
The DS90UB948-Q1 is a FPD-Link III deserializer which, in conjunction with the DS90UB949A/949/947-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a FPD-Link (OpenLDI) interface. The Deserializer is capable of operating over cost-effective 50-Ω single-ended coaxial or 100-Ω differential shielded twisted-pair (STP) cables. It recovers the data from one or two FPD-Link III serial streams and translates it into dual pixel FPD-Link (8 LVDS data lanes + clock) supporting video resolutions up to 2K (2048x1080) with 24-bit color depth. This provides a bridge between HDMI enabled sources such as GPUs to connect to existing LVDS displays or application processors.
The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C and SPI communication, over the same differential link. Consolidation of video data and control over two differential pairs decreases the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and 720p resolutions with 24-bit color depth over a single differential link.
The device automatically senses the FPD-Link III channels and supplies a clock alignment and de-skew functionality without the need for any special training patterns. This ensures skew phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair length differences, and connector imbalances.
The DS90UB948-Q1 is a FPD-Link III deserializer which, in conjunction with the DS90UB949A/949/947-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a FPD-Link (OpenLDI) interface. The Deserializer is capable of operating over cost-effective 50-Ω single-ended coaxial or 100-Ω differential shielded twisted-pair (STP) cables. It recovers the data from one or two FPD-Link III serial streams and translates it into dual pixel FPD-Link (8 LVDS data lanes + clock) supporting video resolutions up to 2K (2048x1080) with 24-bit color depth. This provides a bridge between HDMI enabled sources such as GPUs to connect to existing LVDS displays or application processors.
The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C and SPI communication, over the same differential link. Consolidation of video data and control over two differential pairs decreases the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and 720p resolutions with 24-bit color depth over a single differential link.
The device automatically senses the FPD-Link III channels and supplies a clock alignment and de-skew functionality without the need for any special training patterns. This ensures skew phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair length differences, and connector imbalances.
