74HC165PW-Q100 Series

The 74HC165-Q100; 74HCT165-Q100 are 8-bit serial or parallel-in/serial-out shift registers. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 andQ7). When the parallel load input (PL) is LOW the data from D0 to D7 is loaded into the shift register asynchronously. WhenPLis HIGH data enters the register serially at DS. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH transitions of the CP input. A HIGH onCEwill disable the CP input. Inputs are overvoltage tolerant to 15 V. This enables the device to be used in HIGH-to-LOW level shifting applications.