Catalog
Graphics System Processor
Key Features
• Class B High-Reliability Processing1-µm CMOS TechnologyMilitary Operating Temperature Range–55°C to 125°CSMJ34020A-32/40125/100-ns Instruction Cycle TimeFully Programmable 32-Bit General-Purpose Processor With 512-Megabyte Linear Address Range (Bit Addressable)Second-Generation Graphics System ProcessorObject-Code Compatible With the SMJ34010Enhanced Instruction SetOptimized Graphics InstructionsCoprocessor InterfacePixel Processing, XY Addressing, and Window Checking Built Into the Instruction SetProgrammable 1-, 2-, 4-, 8-, 16-, or 32-Bit Pixel Size With 16 Boolean and Six Arithmetic Pixel Processing Options (Raster Ops)512-Byte LRU On-Chip Instruction CacheOptimized DRAM/VRAM InterfacePage-Mode for Burst Memory OperationsDynamic Bus Sizing (16-Bit and 32-Bit Transfers)Byte-Oriented CAS\ StrobesFlexible Host Processor InterfaceSupports Host TransfersDirect Access to All of the SMJ34020A Address SpaceImplicit AddressingPrefetch for Enhanced Read AccessProgrammable CRT ControlComposite Sync ModeSeparate Sync ModeSynchronization to External SyncDirect Support for Special Features of 1M VRAMsLoad Write MaskLoad Color MaskBlock WriteWrite Using the Write MaskFlexible Multi-Processor InterfacePackaging Options145-Pin Grid Array Ceramic Package (GB Suffix)132-Pin Ceramic Quad Flat Pack (Unformed Lead) (HT Suffix)Class B High-Reliability Processing1-µm CMOS TechnologyMilitary Operating Temperature Range–55°C to 125°CSMJ34020A-32/40125/100-ns Instruction Cycle TimeFully Programmable 32-Bit General-Purpose Processor With 512-Megabyte Linear Address Range (Bit Addressable)Second-Generation Graphics System ProcessorObject-Code Compatible With the SMJ34010Enhanced Instruction SetOptimized Graphics InstructionsCoprocessor InterfacePixel Processing, XY Addressing, and Window Checking Built Into the Instruction SetProgrammable 1-, 2-, 4-, 8-, 16-, or 32-Bit Pixel Size With 16 Boolean and Six Arithmetic Pixel Processing Options (Raster Ops)512-Byte LRU On-Chip Instruction CacheOptimized DRAM/VRAM InterfacePage-Mode for Burst Memory OperationsDynamic Bus Sizing (16-Bit and 32-Bit Transfers)Byte-Oriented CAS\ StrobesFlexible Host Processor InterfaceSupports Host TransfersDirect Access to All of the SMJ34020A Address SpaceImplicit AddressingPrefetch for Enhanced Read AccessProgrammable CRT ControlComposite Sync ModeSeparate Sync ModeSynchronization to External SyncDirect Support for Special Features of 1M VRAMsLoad Write MaskLoad Color MaskBlock WriteWrite Using the Write MaskFlexible Multi-Processor InterfacePackaging Options145-Pin Grid Array Ceramic Package (GB Suffix)132-Pin Ceramic Quad Flat Pack (Unformed Lead) (HT Suffix)
Description
AI
The SMJ34020A graphics system processor (GSP) is the second generation of an advanced high-performance CMOS 32-bit microprocessor optimized for graphics display systems. With a built-in instruction cache, the ability to simultaneously access memory and registers, and an instruction set designed to expedite raster graphics operations, the SMJ34020A provides user-programmable control of the CRT interface as well as the memory interface (both standard DRAM and multiport video RAM). The 4-gigabit (512-megabyte) physical address space is addressable on bit boundaries using variable width data fields (1 to 32 bits). Additional graphics addressing modes support 1-, 2-, 4-, 8-, 16- and 32-bit wide pixels.
The SMJ34020A graphics system processor (GSP) is the second generation of an advanced high-performance CMOS 32-bit microprocessor optimized for graphics display systems. With a built-in instruction cache, the ability to simultaneously access memory and registers, and an instruction set designed to expedite raster graphics operations, the SMJ34020A provides user-programmable control of the CRT interface as well as the memory interface (both standard DRAM and multiport video RAM). The 4-gigabit (512-megabyte) physical address space is addressable on bit boundaries using variable width data fields (1 to 32 bits). Additional graphics addressing modes support 1-, 2-, 4-, 8-, 16- and 32-bit wide pixels.
