Catalog
400-Mbps LVDS single high speed differential driver
Key Features
• Designed for signaling rates up to 400-MbpsSingle 3.3-V Power Supply (3-V to 3.6-V Range)700-ps (100-ps typical) maximum differential skew1.5-ns maximum propagation delayDrives small swing (±350-mV) differential signal levelsPower off protection (Outputs in TRI-STATE)Flow-through pinout simplifies PCB layoutLow power dissipation (23-mW at 3.3 V typical)5-pin SOT-23 packageMeets or exceeds ANSI TIA/EIA-644-A standardIndustrial temperature operating range (–40°C to +85°C)Designed for signaling rates up to 400-MbpsSingle 3.3-V Power Supply (3-V to 3.6-V Range)700-ps (100-ps typical) maximum differential skew1.5-ns maximum propagation delayDrives small swing (±350-mV) differential signal levelsPower off protection (Outputs in TRI-STATE)Flow-through pinout simplifies PCB layoutLow power dissipation (23-mW at 3.3 V typical)5-pin SOT-23 packageMeets or exceeds ANSI TIA/EIA-644-A standardIndustrial temperature operating range (–40°C to +85°C)
Description
AI
The DSLVDS1001 device is a single-channel, Low-Voltage Differential Signaling (LVDS) driver device designed for applications requiring low power dissipation, low noise, and high data rates. In addition, the short-circuit fault current is also minimized. The device is designed to support data rates that are up to 400-Mbps (200-MHz) using LVDS technology.
The DSLVDS1001 accepts a 3.3-V LVCMOS/LVTTL input level and outputs low voltage (±350-mV typical) differential signals that have low electromagnetic interference (EMI). The device is in a 5-pin SOT-23 package that is designed for easy PCB layout. The DSLVDS1001 can be paired with its companion single line receiver, the DSLVDS1002, or with any LVDS receiver, to provide a high-speed LVDS interface.
The DSLVDS1001 device is a single-channel, Low-Voltage Differential Signaling (LVDS) driver device designed for applications requiring low power dissipation, low noise, and high data rates. In addition, the short-circuit fault current is also minimized. The device is designed to support data rates that are up to 400-Mbps (200-MHz) using LVDS technology.
The DSLVDS1001 accepts a 3.3-V LVCMOS/LVTTL input level and outputs low voltage (±350-mV typical) differential signals that have low electromagnetic interference (EMI). The device is in a 5-pin SOT-23 package that is designed for easy PCB layout. The DSLVDS1001 can be paired with its companion single line receiver, the DSLVDS1002, or with any LVDS receiver, to provide a high-speed LVDS interface.
