Catalog
DDR VDDQ and Termination Voltage Regulator
Key Features
• Two linear regulators: Maximum 2A current from VDDQ and Source and sink up to 2A VTT current
• 1.7V to 2.8V adjustable VDDQ output voltage
• 500mV typical VDDQ dropout voltage at 2A
• Excellent load and line regulation, low noise
• Meet JEDEC DDR-I and DDR-II memory power spec
Description
AI
The CM3202-00 is a dual-output low noise linear regulator designed to meet SSTL-2 and SSTL-3 specifications for DDR-SDRAM VDDQ supply and termination voltage VTTsupply. With integrated power MOSFET's, the CM3202-00 can source up to 2A of VDDQcontinuous current, and source or sink up to 2A VTT continuous current. The typical dropout voltage for VDDQ is 500mV at 2A load current. The CM3202-00 provides fast response to transient load changes. Load regulation is excellent, from no load to full load. It also has built-in over-current limits and thermal shutdown at 170°C. The CM3202-00 supports Suspend-To-RAM (STR) and ACPI compliance with shutdown mode which tri-states VTT to minimize quiescent system current. The CM3202-00 is packaged in an easy-to-use TDFN-8. Low thermal resistance allows it to withstand high power dissipation at 85°C ambient. It operates over the industrial ambient temperature range of -40°C to 85°C.
