LMK02002 Series

1 to 800-MHz, precision clock distributor with integrated PLL and 4 LVPECL outputs

Catalog

1 to 800-MHz, precision clock distributor with integrated PLL and 4 LVPECL outputs

Part	Number of Circuits	Differential - Input:Output [custom]	Differential - Input:Output [custom]	Mounting Type	PLL	Type	Ratio - Input:Output [custom]	Frequency - Max [Max]	Input	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Divider/Multiplier	Output	Voltage - Supply [Max]	Voltage - Supply [Min]
Texas Instruments LMK02002ISQX/NOPB	1			Surface Mount		Clock Conditioner	2:4	800 MHz	LVCMOS LVDS LVPECL	48-WFQFN Exposed Pad	85 °C	-40 °C	48-WQFN (7x7)	Yes/No	LVPECL	3.45 V	3.15 V

Catalog

1 to 800-MHz, precision clock distributor with integrated PLL and 4 LVPECL outputs

Key Features

• 20 fs additive jitterIntegrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/HzClock output frequency range of 1 to 800 MHz4 LVPECL clock outputsDedicated divider and delay blocks on each clock outputPin compatible family of clocking devices3.15 to 3.45 V operationPackage: 48 pin LLP (7.0 x 7.0 x 0.8 mm)Target ApplicationsData Converter ClockingNetworking, SONET/SDH, DSLAMWireless InfrastructureMedicalTest and MeasurementMilitary / Aerospace20 fs additive jitterIntegrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/HzClock output frequency range of 1 to 800 MHz4 LVPECL clock outputsDedicated divider and delay blocks on each clock outputPin compatible family of clocking devices3.15 to 3.45 V operationPackage: 48 pin LLP (7.0 x 7.0 x 0.8 mm)Target ApplicationsData Converter ClockingNetworking, SONET/SDH, DSLAMWireless InfrastructureMedicalTest and MeasurementMilitary / Aerospace

Description

TheLMK02002precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), and four LVPECL clock output distribution blocks. Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components. The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family. TheLMK02002precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), and four LVPECL clock output distribution blocks. Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components. The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.