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CD4007UB-MIL

CD4007UB-MIL Series

CMOS Dual Complementary Pair Plus Inverter

Manufacturer: Texas Instruments

Catalog

CMOS Dual Complementary Pair Plus Inverter

Key Features

Standardized symmetrical output characteristicsMedium Speed Operation — tPHL, tPLH= 30 ns (typ.) at 10 V100% tested for quiescent current at 20 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CApplications:Extremely high-input impedance amplifiersShapersInvertersThreshold detectorLinear amplifiersCrystal oscillatorsData sheet acquired from Harris SemiconductorStandardized symmetrical output characteristicsMedium Speed Operation — tPHL, tPLH= 30 ns (typ.) at 10 V100% tested for quiescent current at 20 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CApplications:Extremely high-input impedance amplifiersShapersInvertersThreshold detectorLinear amplifiersCrystal oscillatorsData sheet acquired from Harris Semiconductor

Description

AI
CD4007UB types are comprised of three n-channel and three p-channel enhancement-type MOS transistors. The transistor elements are accessible through the package terminals to provide a convenient means for constructing the various typical circuits as shown in Fig. 2. More complex functions are possible using multiple packages. Numbers shown in parentheses indicate terminals that are connected together to form the various configurations listed. The CD4007UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes). CD4007UB types are comprised of three n-channel and three p-channel enhancement-type MOS transistors. The transistor elements are accessible through the package terminals to provide a convenient means for constructing the various typical circuits as shown in Fig. 2. More complex functions are possible using multiple packages. Numbers shown in parentheses indicate terminals that are connected together to form the various configurations listed. The CD4007UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).