PCM5102A-Q1 Series
Automotive Catalog 2VRMS DirectPath™, 112dB Audio Stereo DAC with 32-bit, 384kHz PCM Interface
Manufacturer: Texas Instruments
Catalog
Automotive Catalog 2VRMS DirectPath™, 112dB Audio Stereo DAC with 32-bit, 384kHz PCM Interface
Key Features
• Qualified for Automotive ApplicationsAEC-Q100 Qualified With the Following Results:Device Temperature Grade 2: –40°C to 105°C AmbientOperating Temperature RangeDevice HBM ESD Classification Level H2Device CDM ESD Classification Level C3BMarket-Leading Low Out-of-Band NoiseSelectable Digital-Filter Latency and PerformanceNo DC Blocking Capacitors RequiredIntegrated Negative Charge PumpInternal Pop-Free Control For Sample-Rate Changes or Clock HaltsIntelligent Muting System; Soft Up/Down Rampand Analog Mute For 120-dB Mute SNR With Popless Operation.Integrated High-Performance Audio PLL With BCK Reference toGenerate SCK InternallySmall 20-pin TSSOP PackageOther Key FeaturesAccepts 16-, 24-, and 32-Bit Audio DataPCM Data Formats: I2S, Left-JustifiedAutomatic Power-Save Mode When LRCK And BCK Are Deactivated3.3-V Failsafe LVCMOS Digital InputsHardware ConfigurationSingle-Supply Operation:3.3-V Analog, 3.3-V DigitalIntegrated Power-On ResetQualified for Automotive ApplicationsAEC-Q100 Qualified With the Following Results:Device Temperature Grade 2: –40°C to 105°C AmbientOperating Temperature RangeDevice HBM ESD Classification Level H2Device CDM ESD Classification Level C3BMarket-Leading Low Out-of-Band NoiseSelectable Digital-Filter Latency and PerformanceNo DC Blocking Capacitors RequiredIntegrated Negative Charge PumpInternal Pop-Free Control For Sample-Rate Changes or Clock HaltsIntelligent Muting System; Soft Up/Down Rampand Analog Mute For 120-dB Mute SNR With Popless Operation.Integrated High-Performance Audio PLL With BCK Reference toGenerate SCK InternallySmall 20-pin TSSOP PackageOther Key FeaturesAccepts 16-, 24-, and 32-Bit Audio DataPCM Data Formats: I2S, Left-JustifiedAutomatic Power-Save Mode When LRCK And BCK Are Deactivated3.3-V Failsafe LVCMOS Digital InputsHardware ConfigurationSingle-Supply Operation:3.3-V Analog, 3.3-V DigitalIntegrated Power-On Reset
Description
AI
The PCM510x-Q1 family is a series of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM510x-Q1 uses the latest generation of TI’s advanced segment-DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.
The PCM510x-Q1 provides 2.1-VRMSground-centered outputs, allowing designers to eliminate not only dc blocking capacitors on the output, but also external muting circuits traditionally associated with single-supply line drivers.
The integrated line driver surpasses all other charge-pump-based line drivers by supporting loads down to 1 kΩ. By supporting loads down to 1 k&3937;, the PCM510x-Q1 can essentially drive up to 10 products in parallel (LCD TV, DVDR, AV receivers, and so on).
The integrated PLL on the device removes the requirement for a system clock (commonly known as master clock). This allows a three-wire I2S connection, along with reduced system EMI.
Intelligent clock error and PowerSense undervoltage protection uses a two-level mute system for pop-free performance. On clock error or system power failure, the device digitally attenuates the data (or last known-good data), then mutes the analog circuit
Compared with existing DAC technology, the PCM510x-Q1 offers up to 20-dB lower out-of-band (OBN) noise, reducing EMI and aliasing in downstream amplifiers/ADCs. (from traditional 100-kHz OBN measurements all the way to 3 MHz)
The PCM510x-Q1 accepts industry-standard audio data formats with 16- to 32-bit data and supports sSample rates up to 384 kHz.
The PCM510x-Q1 family is a series of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM510x-Q1 uses the latest generation of TI’s advanced segment-DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.
The PCM510x-Q1 provides 2.1-VRMSground-centered outputs, allowing designers to eliminate not only dc blocking capacitors on the output, but also external muting circuits traditionally associated with single-supply line drivers.
The integrated line driver surpasses all other charge-pump-based line drivers by supporting loads down to 1 kΩ. By supporting loads down to 1 k&3937;, the PCM510x-Q1 can essentially drive up to 10 products in parallel (LCD TV, DVDR, AV receivers, and so on).
The integrated PLL on the device removes the requirement for a system clock (commonly known as master clock). This allows a three-wire I2S connection, along with reduced system EMI.
Intelligent clock error and PowerSense undervoltage protection uses a two-level mute system for pop-free performance. On clock error or system power failure, the device digitally attenuates the data (or last known-good data), then mutes the analog circuit
Compared with existing DAC technology, the PCM510x-Q1 offers up to 20-dB lower out-of-band (OBN) noise, reducing EMI and aliasing in downstream amplifiers/ADCs. (from traditional 100-kHz OBN measurements all the way to 3 MHz)
The PCM510x-Q1 accepts industry-standard audio data formats with 16- to 32-bit data and supports sSample rates up to 384 kHz.
