F28M35M52C Series

C2000™ Dual Core 32-bit MCU with 150 MIPS, 1024 KB Flash

Catalog

C2000™ Dual Core 32-bit MCU with 150 MIPS, 1024 KB Flash

Part	RAM Size	Number of I/O	Mounting Type	Peripherals	Data Converters	Voltage - Supply (Vcc/Vdd)	Connectivity	Program Memory Size	Core Processor	Package / Case	Program Memory Type	Operating Temperature [Min]	Operating Temperature [Max]	Core Size [custom]	Supplier Device Package
Texas Instruments F28M35M52C1RFPS	136 KB	74 I/O	Surface Mount	Brown-out Detect/Reset DMA POR PWM WDT	A/D 20x12b	1.2 V 1.8 V 3.3 V	CANbus EBI/EMI Ethernet I2C SCI SPI SSI UART/USART USB USB OTG	512 KB	C28x/ARM® Cortex®-M3	144-TQFP Exposed Pad	FLASH	-40 °C	125 ¯C	32-Bit Dual-Core	144-HTQFP (20x20)

Catalog

C2000™ Dual Core 32-bit MCU with 150 MIPS, 1024 KB Flash

Key Features

• Master Subsystem — Arm Cortex-M3Up to 100 MHzEmbedded memoryUp to 512KB of flash (ECC)Up to 32KB of RAM (ECC or parity)Up to 64KB of shared RAM2KB of IPC Message RAMFive Universal Asynchronous Receiver/Transmitters (UARTs)Four Synchronous Serial Interfaces (SSIs) and a Serial Peripheral Interface (SPI)Two Inter-integrated Circuits (I2Cs)Universal Serial Bus On-the-Go (USB-OTG) + PHY10/100 ENET 1588 MIITwo Controller Area Network, D_CAN, modules (pin-bootable)32-channel Micro Direct Memory Access (µDMA)Dual security zones (128-bit password per zone)External Peripheral Interface (EPI)Micro Cyclic Redundancy Check (µCRC) moduleFour general-purpose timersTwo watchdog timer modulesThree external interruptsEndianness: little endianClockingOn-chip crystal oscillator and external clock inputDynamic Phase-Locked Loop (PLL) ratio changes supported1.2-V digital, 1.8-V analog, 3.3-V I/O designInterprocessor Communications (IPC)32 handshaking channelsFour channels generate IPC interruptsCan be used to coordinate transfer of data through IPC Message RAMsUp to 74 individually programmable, multiplexed General-Purpose Input/Output (GPIO) pinsGlitch-free I/OsControl Subsystem — TMS320C28x 32-bit CPUUp to 150 MHzC28x core hardware built-in self-testEmbedded memoryUp to 512KB of flash (ECC)Up to 36KB of RAM (ECC or parity)Up to 64KB of shared RAM2KB of IPC Message RAMIEEE-754 single-precision Floating-Point Unit (FPU)Viterbi, Complex Math, CRC Unit (VCU)Serial Communications Interface (SCI)SPII2C6-channel Direct Memory Access (DMA)Nine Enhanced Pulse Width Modulator (ePWM) modules18 outputs (16 high-resolution)Six 32-bit Enhanced Capture (eCAP) modulesThree 32-bit Enhanced Quadrature Encoder Pulse (eQEP) modulesMultichannel Buffered Serial Port (McBSP)EPIOne security zone (128-bit password)Three 32-bit timersEndianness: little endianAnalog SubsystemDual 12-bit Analog-to-Digital Converters (ADCs)Up to 2.88 MSPSUp to 20 channelsFour Sample-and-Hold (S/H) circuitsUp to six comparators with 10-bit Digital-to-Analog Converter (DAC)Package144-Pin RFP PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP)Temperature options:T: –40°C to 105°C JunctionS: –40°C to 125°C JunctionQ: –40°C to 125°C Free-Air (AEC Q100 qualification for automotive applications)Master Subsystem — Arm Cortex-M3Up to 100 MHzEmbedded memoryUp to 512KB of flash (ECC)Up to 32KB of RAM (ECC or parity)Up to 64KB of shared RAM2KB of IPC Message RAMFive Universal Asynchronous Receiver/Transmitters (UARTs)Four Synchronous Serial Interfaces (SSIs) and a Serial Peripheral Interface (SPI)Two Inter-integrated Circuits (I2Cs)Universal Serial Bus On-the-Go (USB-OTG) + PHY10/100 ENET 1588 MIITwo Controller Area Network, D_CAN, modules (pin-bootable)32-channel Micro Direct Memory Access (µDMA)Dual security zones (128-bit password per zone)External Peripheral Interface (EPI)Micro Cyclic Redundancy Check (µCRC) moduleFour general-purpose timersTwo watchdog timer modulesThree external interruptsEndianness: little endianClockingOn-chip crystal oscillator and external clock inputDynamic Phase-Locked Loop (PLL) ratio changes supported1.2-V digital, 1.8-V analog, 3.3-V I/O designInterprocessor Communications (IPC)32 handshaking channelsFour channels generate IPC interruptsCan be used to coordinate transfer of data through IPC Message RAMsUp to 74 individually programmable, multiplexed General-Purpose Input/Output (GPIO) pinsGlitch-free I/OsControl Subsystem — TMS320C28x 32-bit CPUUp to 150 MHzC28x core hardware built-in self-testEmbedded memoryUp to 512KB of flash (ECC)Up to 36KB of RAM (ECC or parity)Up to 64KB of shared RAM2KB of IPC Message RAMIEEE-754 single-precision Floating-Point Unit (FPU)Viterbi, Complex Math, CRC Unit (VCU)Serial Communications Interface (SCI)SPII2C6-channel Direct Memory Access (DMA)Nine Enhanced Pulse Width Modulator (ePWM) modules18 outputs (16 high-resolution)Six 32-bit Enhanced Capture (eCAP) modulesThree 32-bit Enhanced Quadrature Encoder Pulse (eQEP) modulesMultichannel Buffered Serial Port (McBSP)EPIOne security zone (128-bit password)Three 32-bit timersEndianness: little endianAnalog SubsystemDual 12-bit Analog-to-Digital Converters (ADCs)Up to 2.88 MSPSUp to 20 channelsFour Sample-and-Hold (S/H) circuitsUp to six comparators with 10-bit Digital-to-Analog Converter (DAC)Package144-Pin RFP PowerPAD™ Thermally Enhanced Thin Quad Flatpack (HTQFP)Temperature options:T: –40°C to 105°C JunctionS: –40°C to 125°C JunctionQ: –40°C to 125°C Free-Air (AEC Q100 qualification for automotive applications)

Description

The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M35x family of devices is the first series in the Concerto family. The communications subsystem is based on the industry-standard 32-bit Arm Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C, and an external interface. The real-time control subsystem is based on TI’s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures—all as implemented by TI’s TMS320C2000™Entry performance MCUsandPremium performance MCUs. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs, and CRC algorithms. A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification. The Concerto family is a multicore system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M35x family of devices is the first series in the Concerto family. The communications subsystem is based on the industry-standard 32-bit Arm Cortex-M3 CPU and features a wide variety of communication peripherals, including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C, and an external interface. The real-time control subsystem is based on TI’s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures—all as implemented by TI’s TMS320C2000™Entry performance MCUsandPremium performance MCUs. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs, and CRC algorithms. A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification.