Catalog
DLP® display controller for DLP2000 (0.2 nHD) DMD
Key Features
• Supports Reliable Operation of the 0.2-nHD,0.24-VGA, and 0.3-WVGA DMDsMulti-Mode, 24-Bit Input Pixel Interfaces:Supports Parallel or BT656 Bus ProtocolSupports Input Sizes from QVGA Through WVGASupports 1- to 60-Hz Frame RatesSupports Pixel Clock up to 33.5 MHzSupports Landscape and Portrait OrientationsSupport 8-, 16-, 18-, and 24-Bit Bus OptionsSupports 3 Input Color Bit-Depth Options:RGB888, YCrCb888RGB666, YCrCb666RGB565, 4:2:2 YCrCbPixel Data Processing:Image Resizing (Scaling)Frame Rate ConversionColor Coordinate AdjustmentAutomatic Gain ControlProgrammable DegammaSpatial-Temporal Multiplexing (Dithering)Video Processing Support:Color Space Conversion4:2:2 to 4:4:4 Chroma InterpolationField Scaled De-InterlacingPackaged in a 176-Pin, 0.4-mm Pitch, VFBGAExternal Memory Support:166-MHz Mobile DDR SDRAM33.3-MHz Serial FlashWVGA, VGA, and nHD DMD Display SupportDMD Bit-Plane Generation and FormattingProgrammable Bit-Plane Display Sequencer (Controls the LED Enables and DMD Loading)76.2-MHz Double Data Rate (DDR) DMD I/FPulse-Width Modulation (PWM) for Mirrors:Auto DMD Parking at Power-Down24-Bit Bit-Depth on DMDSystem Control:I2C Control of Device ConfigurationProgrammable Splash ScreensProgrammable LED Current ControlDMD Power and Mirror Driver ControlDMD Horizontal and Vertical Display Image FlipDisplay Image RotationFlash-Based Configuration Batch FilesI/F Sleep Still Image Power Savings ModeTest Support:Built-In Test Pattern GenerationJTAG With Boundary Scan Test SupportSupports Reliable Operation of the 0.2-nHD,0.24-VGA, and 0.3-WVGA DMDsMulti-Mode, 24-Bit Input Pixel Interfaces:Supports Parallel or BT656 Bus ProtocolSupports Input Sizes from QVGA Through WVGASupports 1- to 60-Hz Frame RatesSupports Pixel Clock up to 33.5 MHzSupports Landscape and Portrait OrientationsSupport 8-, 16-, 18-, and 24-Bit Bus OptionsSupports 3 Input Color Bit-Depth Options:RGB888, YCrCb888RGB666, YCrCb666RGB565, 4:2:2 YCrCbPixel Data Processing:Image Resizing (Scaling)Frame Rate ConversionColor Coordinate AdjustmentAutomatic Gain ControlProgrammable DegammaSpatial-Temporal Multiplexing (Dithering)Video Processing Support:Color Space Conversion4:2:2 to 4:4:4 Chroma InterpolationField Scaled De-InterlacingPackaged in a 176-Pin, 0.4-mm Pitch, VFBGAExternal Memory Support:166-MHz Mobile DDR SDRAM33.3-MHz Serial FlashWVGA, VGA, and nHD DMD Display SupportDMD Bit-Plane Generation and FormattingProgrammable Bit-Plane Display Sequencer (Controls the LED Enables and DMD Loading)76.2-MHz Double Data Rate (DDR) DMD I/FPulse-Width Modulation (PWM) for Mirrors:Auto DMD Parking at Power-Down24-Bit Bit-Depth on DMDSystem Control:I2C Control of Device ConfigurationProgrammable Splash ScreensProgrammable LED Current ControlDMD Power and Mirror Driver ControlDMD Horizontal and Vertical Display Image FlipDisplay Image RotationFlash-Based Configuration Batch FilesI/F Sleep Still Image Power Savings ModeTest Support:Built-In Test Pattern GenerationJTAG With Boundary Scan Test Support
Description
AI
The DLPC2607 is a low power DLP™ digital controller for battery powered display applications. The controller supports reliable operation of 0.3-WVGA, 0.24-VGA and 0.2-nHD DMDs. The DLPC2607 controller provides a convenient, multi-functional interface between system electronics and the DMD, enabling small form factor and low power displays.
The DLPC2607 is a low power DLP™ digital controller for battery powered display applications. The controller supports reliable operation of 0.3-WVGA, 0.24-VGA and 0.2-nHD DMDs. The DLPC2607 controller provides a convenient, multi-functional interface between system electronics and the DMD, enabling small form factor and low power displays.
