ADC12D1800RF Series

12-Bit, Dual 1.8GSPS or Single 3.6GSPS, RF-Sampling Analog-to-Digital Converter (ADC)

Catalog

12-Bit, Dual 1.8GSPS or Single 3.6GSPS, RF-Sampling Analog-to-Digital Converter (ADC)

Part	Supplier Device Package	Number of Inputs	Features	Voltage - Supply, Analog [Min]	Voltage - Supply, Analog [Max]	Sampling Rate (Per Second)	Mounting Type	Input Type	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Reference Type	Number of A/D Converters	Number of Bits	Package / Case	Architecture	Configuration	Data Interface	Ratio - S/H:ADC	Operating Temperature [Max]	Operating Temperature [Min]
Texas Instruments ADC12D1800RFIUT/NOPB	292-BGA (27x27)	2	Simultaneous Sampling	1.8 V	2 V	3.6G	Surface Mount	Differential	2 V	1.8 V	Internal	2	12 bits	292-BBGA	Folding Interpolating	MUX-S/H-ADC	LVDS - Parallel	1:1	85 °C	-40 °C
Texas Instruments ADC12D1800CIUT/NOPB	292-BGA (27x27)					3.6G	Surface Mount					2	12 bits	292-BBGA					85 °C	-40 °C

Catalog

12-Bit, Dual 1.8GSPS or Single 3.6GSPS, RF-Sampling Analog-to-Digital Converter (ADC)

Key Features

• Excellent Noise and Linearity Up to and Above fIN= 2.7 GHzConfigurable to Either 3.6 GSPS Interleaved or 1800 MSPS Dual ADCNew DESCLKIQ Mode for High Bandwidth, High Sampling Rate AppsPin-Compatible with ADC1xD1x00, ADC12Dx00RFAutoSync Feature for Multi-Chip SynchronizationInternally Terminated, Buffered, Differential Analog InputsInterleaved Timing Automatic and Manual Skew AdjustTest Patterns at Output for System DebugTime Stamp Feature to Capture External TriggerProgrammable Gain, Offset, and tADAdjust1:1 Non-Demuxed or 1:2 Demuxed LVDS OutputsKey SpecificationsResolution: 12 BitsInterleaved 3.6 GSPS ADC (all typical)IMD3 (Fin = 2.7GHz at -13dBFS) –62 dBcIMD3 (Fin = 2.7GHz at -16dBFS) –64 dBcNoise Floor Density -155.0 dBm/HzPower 4.29 WDual 1800 MSPS ADC, Fin = 498 MHzENOB 9.3 Bits (typ)SNR 58.1 dB (typ)SFDR 71.7 dBc (typ)Power per Channel 2.15 W (typ)Excellent Noise and Linearity Up to and Above fIN= 2.7 GHzConfigurable to Either 3.6 GSPS Interleaved or 1800 MSPS Dual ADCNew DESCLKIQ Mode for High Bandwidth, High Sampling Rate AppsPin-Compatible with ADC1xD1x00, ADC12Dx00RFAutoSync Feature for Multi-Chip SynchronizationInternally Terminated, Buffered, Differential Analog InputsInterleaved Timing Automatic and Manual Skew AdjustTest Patterns at Output for System DebugTime Stamp Feature to Capture External TriggerProgrammable Gain, Offset, and tADAdjust1:1 Non-Demuxed or 1:2 Demuxed LVDS OutputsKey SpecificationsResolution: 12 BitsInterleaved 3.6 GSPS ADC (all typical)IMD3 (Fin = 2.7GHz at -13dBFS) –62 dBcIMD3 (Fin = 2.7GHz at -16dBFS) –64 dBcNoise Floor Density -155.0 dBm/HzPower 4.29 WDual 1800 MSPS ADC, Fin = 498 MHzENOB 9.3 Bits (typ)SNR 58.1 dB (typ)SFDR 71.7 dBc (typ)Power per Channel 2.15 W (typ)

Description

The 12-bit, 3.6 GSPS ADC12D1800 is the latest advance in TI’s Ultra-High-Speed ADC family and builds upon the features, architecture and functionality of the 10-bit GHz family of ADCs. The ADC12D1800 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage. The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C. To achieve full rated performance for fCLK> 1.6 GHz, write the maximum power settings one time to Register 6h through the serial interface; see Section 5.6.1 for more information. The 12-bit, 3.6 GSPS ADC12D1800 is the latest advance in TI’s Ultra-High-Speed ADC family and builds upon the features, architecture and functionality of the 10-bit GHz family of ADCs. The ADC12D1800 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage. The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C. To achieve full rated performance for fCLK> 1.6 GHz, write the maximum power settings one time to Register 6h through the serial interface; see Section 5.6.1 for more information.