ADC12D1600RF Series

12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling analog-to-digital converter (ADC)

Catalog

12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling analog-to-digital converter (ADC)

Part	Operating Temperature [Max]	Operating Temperature [Min]	Number of Bits	Mounting Type	Number of A/D Converters	Sampling Rate (Per Second)	Package / Case	Supplier Device Package	Voltage - Supply, Analog [Min]	Voltage - Supply, Analog [Max]	Data Interface	Features	Configuration	Architecture	Input Type	Number of Inputs	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Ratio - S/H:ADC	Reference Type
Texas Instruments ADC12D1600CIUT/NOPB	85 °C	-40 °C	12 bits	Surface Mount	2	3.2 G	292-BBGA	292-BGA (27x27)
Texas Instruments ADC12D1600RFIUT	85 °C	-40 °C	12 bits	Surface Mount	2	3.2 G	292-BBGA	292-BGA (27x27)	1.8 V	2 V	LVDS - Parallel	Simultaneous Sampling	MUX-S/H-ADC	Folding Interpolating	Differential	2	2 V	1.8 V	1:1	Internal
Texas Instruments ADC12D1600RFIUT/NOPB	85 °C	-40 °C	12 bits	Surface Mount	2	3.2 G	292-BBGA	292-BGA (27x27)	1.8 V	2 V	LVDS - Parallel	Simultaneous Sampling	MUX-S/H-ADC	Folding Interpolating	Differential	2	2 V	1.8 V	1:1	Internal

Catalog

12-bit, dual 1.6-GSPS or single 3.2-GSPS, RF-sampling analog-to-digital converter (ADC)

Key Features

• Excellent Noise and Linearity up to and Above fIN=2.7 GHzConfigurable to Either 3.2 or 2 GSPS Interleavedor 1600 or 1000 MSPS Dual ADCNew DESCLKIQ Mode for High Bandwidth, HighSampling Rate AppsPin-Compatible With ADC10D1x00, ADC12D1x00AutoSync Feature for Multi-Chip SynchronizationInternally Terminated, Buffered, Differential AnalogInputsInterleaved Timing Automatic and Manual SkewAdjustTest Patterns at Output for System DebugTime Stamp Feature to Capture External TriggerProgrammable Gain, Offset, and tADAdjustFeature1:1 Non-Demuxed or 1:2 Demuxed LVDS OutputsKey SpecificationsResolution 12 BitsInterleaved 3.2- and 2-GSPS ADCIMD3(Fin = 2.7 GHz at –13 dBFS) –63.7/–73dBFS (Typical)IMD3(Fin = 2.7 GHz at –16 dBFS) –66.7/–85dBFS (Typical)Noise Floor –154.6/–154 dBm/Hz (Typical)Power 3.94/3.42 W (Typical)Dual 1600/1000 MSPS ADC, Fin = 498 MHzENOB 9.2/9.4 Bits (Typical)SNR 58.2/58.8 dB (Typical)SFDR 66.7/71.9 dBc (Typical)Power per Channel 1.97/1.71 W (Typical)Excellent Noise and Linearity up to and Above fIN=2.7 GHzConfigurable to Either 3.2 or 2 GSPS Interleavedor 1600 or 1000 MSPS Dual ADCNew DESCLKIQ Mode for High Bandwidth, HighSampling Rate AppsPin-Compatible With ADC10D1x00, ADC12D1x00AutoSync Feature for Multi-Chip SynchronizationInternally Terminated, Buffered, Differential AnalogInputsInterleaved Timing Automatic and Manual SkewAdjustTest Patterns at Output for System DebugTime Stamp Feature to Capture External TriggerProgrammable Gain, Offset, and tADAdjustFeature1:1 Non-Demuxed or 1:2 Demuxed LVDS OutputsKey SpecificationsResolution 12 BitsInterleaved 3.2- and 2-GSPS ADCIMD3(Fin = 2.7 GHz at –13 dBFS) –63.7/–73dBFS (Typical)IMD3(Fin = 2.7 GHz at –16 dBFS) –66.7/–85dBFS (Typical)Noise Floor –154.6/–154 dBm/Hz (Typical)Power 3.94/3.42 W (Typical)Dual 1600/1000 MSPS ADC, Fin = 498 MHzENOB 9.2/9.4 Bits (Typical)SNR 58.2/58.8 dB (Typical)SFDR 66.7/71.9 dBc (Typical)Power per Channel 1.97/1.71 W (Typical)

Description

The 12-bit 3.2- and 2-GSPS ADC12D1x00RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D1x00RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 3rdNyquist zone The ADC12D1x00RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common-mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to 85°C. The 12-bit 3.2- and 2-GSPS ADC12D1x00RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D1x00RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 3rdNyquist zone The ADC12D1x00RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common-mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to 85°C.