ADC32RF82 Series

Dual-channel, 14-bit, 2.45-GSPS, RF-sampling telecom receiver and feedback IC

Catalog

Dual-channel, 14-bit, 2.45-GSPS, RF-sampling telecom receiver and feedback IC

Part	Reference Type	Data Interface	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Number of Bits	Features	Voltage - Supply, Analog [Min]	Voltage - Supply, Analog [Max]	Sampling Rate (Per Second)	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Input Type	Supplier Device Package	Number of Inputs	Mounting Type	Number of A/D Converters
Texas Instruments ADC32RF82IRMPR	External	JESD204B	1.2 V	1.1 V	14	Interleavable Simultaneous Sampling	1.1 V	2 V	2.5 G	72-VFQFN Exposed Pad	85 °C	-40 °C	Differential	72-VQFN (10x10)	2	Surface Mount	2
Texas Instruments ADC32RF82IRMPT	External	JESD204B	1.2 V	1.1 V	14	Interleavable Simultaneous Sampling	1.1 V	2 V	2.5 G	72-VFQFN Exposed Pad	85 °C	-40 °C	Differential	72-VQFN (10x10)	2	Surface Mount	2

Catalog

Dual-channel, 14-bit, 2.45-GSPS, RF-sampling telecom receiver and feedback IC

Key Features

• 14-Bit, Dual-Channel, 2457.6-MSPS ADCNoise Floor: –154.1 dBFS/HzRF Input Supports Up to 4.0 GHzAperture Jitter: 90 fSChannel Isolation: 95 dB at fIN= 1.8 GHzSpectral Performance (fIN= 900 MHz, –2 dBFS):SNR: 61.2 dBFSSFDR: 67-dBc HD2, HD3SFDR: 81-dBc Worst SpurSpectral Performance (fIN= 1.85 GHz, –2 dBFS):SNR: 58.7 dBFSSFDR: 71-dBc HD2, HD3SFDR: 76-dBc Worst SpurOn-Chip Digital Down-Converters:Up to 4 DDCs (Dual-Band Mode)Up to 3 Independent NCOs per DDCOn-Chip Input Clamp for Overvoltage ProtectionProgrammable On-Chip Power Detectors with Alarm Pins for AGC SupportOn-Chip DitherOn-Chip Input TerminationInput Full-Scale: 1.35 VPPSupport for Multi-Chip SynchronizationJESD204B Interface:Subclass 1-Based Deterministic Latency4 Lanes Per Channel at 12.5 GbpsPower Dissipation: 3.0 W/Ch at 2457.6 MSPS72-Pin VQFN Package (10 mm × 10 mm)14-Bit, Dual-Channel, 2457.6-MSPS ADCNoise Floor: –154.1 dBFS/HzRF Input Supports Up to 4.0 GHzAperture Jitter: 90 fSChannel Isolation: 95 dB at fIN= 1.8 GHzSpectral Performance (fIN= 900 MHz, –2 dBFS):SNR: 61.2 dBFSSFDR: 67-dBc HD2, HD3SFDR: 81-dBc Worst SpurSpectral Performance (fIN= 1.85 GHz, –2 dBFS):SNR: 58.7 dBFSSFDR: 71-dBc HD2, HD3SFDR: 76-dBc Worst SpurOn-Chip Digital Down-Converters:Up to 4 DDCs (Dual-Band Mode)Up to 3 Independent NCOs per DDCOn-Chip Input Clamp for Overvoltage ProtectionProgrammable On-Chip Power Detectors with Alarm Pins for AGC SupportOn-Chip DitherOn-Chip Input TerminationInput Full-Scale: 1.35 VPPSupport for Multi-Chip SynchronizationJESD204B Interface:Subclass 1-Based Deterministic Latency4 Lanes Per Channel at 12.5 GbpsPower Dissipation: 3.0 W/Ch at 2457.6 MSPS72-Pin VQFN Package (10 mm × 10 mm)

Description

The ADC32RF82 is a 14-bit, 2457.6-MSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF82 delivers a noise spectral density of –154.1 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms. The ADC32RF82 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C). The ADC32RF82 is a 14-bit, 2457.6-MSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF82 delivers a noise spectral density of –154.1 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms. The ADC32RF82 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).