SN74LVC1G38 Series

Single 2-input, 1.65-V to 5.5-V NAND gate with open-drain outputs

Catalog

Single 2-input, 1.65-V to 5.5-V NAND gate with open-drain outputs

Part	Features	Number of Inputs	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Voltage - Supply [Max]	Voltage - Supply [Min]	Logic Type	Current - Quiescent (Max) [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Max Propagation Delay @ V, Max CL	Number of Circuits	Mounting Type	Package / Case	Supplier Device Package	Supplier Device Package [x]	Supplier Device Package [y]
Texas Instruments SN74LVC1G38DBVT	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	125 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	SC-74A SOT-753	SOT-23-5
Texas Instruments SN74LVC1G38DBVRE4	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	125 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	SC-74A SOT-753	SOT-23-5
Texas Instruments SN74LVC1G38YZPR	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	85 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	5-XFBGA DSBGA	5-DSBGA	1.4	0.9
Texas Instruments SN74LVC1G38DPWR	Open Drain	2	1.2 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	85 °C	-40 °C	-	32 mA	0.8 V	0.7 V	4.4 ns	1	Surface Mount	4-XFDFN Exposed Pad	5-X2SON (0.8x0.8)
Texas Instruments SN74LVC1G38YEPR	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	85 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	5-XFBGA DSBGA	5-DSBGA	1.4	0.9
Texas Instruments SN74LVC1G38DRYR	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	125 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	6-UFDFN	6-SON (1.45x1)
Texas Instruments SN74LVC1G38DSFR	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	125 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	6-XFDFN	6-SON (1x1)
Texas Instruments SN74LVC1G38DBVR	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	125 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	SC-74A SOT-753	SOT-23-5
Texas Instruments SN74LVC1G38DCKRG4	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	125 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	5-TSSOP SC-70-5 SOT-353	SC-70-5
Texas Instruments SN74LVC1G38DCKR	Open Drain	2	1.7 V	2 V	5.5 V	1.65 V	NAND Gate	10 µA	125 °C	-40 °C	-	32 mA	0.8 V	0.7 V	3.9 ns	1	Surface Mount	5-TSSOP SC-70-5 SOT-353	SC-70-5

Catalog

Single 2-input, 1.65-V to 5.5-V NAND gate with open-drain outputs

Key Features

• Latch-up performance exceeds 100 mA Per JESD 78, Class IIESD protection exceeds JESD 222000-V Human-body model (A114-A)200-V Machine model (A115-A)1000-V Charged-device model (C101)Available in the Texas InstrumentsNanoStar™ and NanoFree™ PackagesSupports 5-V VCCoperationInputs accept voltages to 5.5 VSupports down translation to VCCMaximum tpdof 4.5 ns at 3.3 VLow power consumption, 10-µA maximum ICC±24-mA Output drive at 3.3 VIoffSupports partial-power-down mode and back-drive protectionLatch-up performance exceeds 100 mA Per JESD 78, Class IIESD protection exceeds JESD 222000-V Human-body model (A114-A)200-V Machine model (A115-A)1000-V Charged-device model (C101)Available in the Texas InstrumentsNanoStar™ and NanoFree™ PackagesSupports 5-V VCCoperationInputs accept voltages to 5.5 VSupports down translation to VCCMaximum tpdof 4.5 ns at 3.3 VLow power consumption, 10-µA maximum ICC±24-mA Output drive at 3.3 VIoffSupports partial-power-down mode and back-drive protection

Description

The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCCoperation. This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y =A × Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCCoperation. This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y =A × Bor Y =A+Bin positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.