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TAS5086

TAS5086 Series

6 Channel Digital Audio PWM Processor

Manufacturer: Texas Instruments

Catalog

6 Channel Digital Audio PWM Processor

Key Features

Audio Input/OutputAutomatic Master Clock Rate and Data Sample Rate DetectionFour Serial Audio Inputs (Eight Channels)Support for 32-, 44.1-, 48-, 88.2-, 96-, 176.4-, and 192-kHz Sampling RatesData Formats: 16-, 20-, or 24-Bit Input Data; Left-Justified, Right-Justified, and I2S64- or 48-fSBit-Clock Rate128-, 192-, 256-, 384-, and 512-fSMaster Clock Rates (Up to a Maximum of 50 MHz)Six PWM Audio Output ChannelsAny Output Channel Can be Mapped to Any Output PinSupports Single-Ended and Bridge-Tied LoadsI2S Serial Audio OutputAudio ProcessingVolume Control Range of 48 dB to -100 dBMaster Volume Control from 24 dB to -100 dB in 0.5-dB IncrementsSix Individual Channel Volume Controls With 24-dB to -100-dB Attenuation in 0.5-dB IncrementsSerial Output Can Be Produced by Downmix of 5.1-Channel Input or Fourth Serial Input5.1-Channel Downmix to 2.1 or 3.1 PWM Output Speaker SystemIntegrated Bass ManagementTwo Programmable Biquads in Subwoofer ChannelFull Six-Channel Input and Output MappingSelectable DC Blocking FiltersPWM Processing8× Oversampling With Fourth-Order Noise Shaping at 44.1, 48 kHz; 4× Oversampling at 88.2, 96 kHz; 2× Oversampling at 176.4, 192 kHz; and 12× Oversampling at 32 kHz≥105-dB Dynamic Range (TAS5086+TAS5186)THD < 0.06% (TAS5086 Only)20-Hz—20-kHz Flat Noise Floor for 44.1-, 48-, 88.2-, 96-, 176.4- and 192-kHz Data RatesDigital De-Emphasis for 32-kHz, 44.1-kHz and 48-kHz Data RatesIntelligent AM Interference Avoidance System Provides Clear AM ReceptionOptimized PWM Sequence for Click- and Popless Start and StopOptimized PWM Sequence for Charging of AC-Coupling Capacitors in Single-Ended ConfigurationsAdjustable Modulation Limit From 93.8% to 99.2%General FeaturesAutomated Operation With Easy-to-Use Control InterfaceI2C Serial Control Slave InterfaceControl Interface Operational Without MCLKSingle 3.3-V Power Supply38-Pin TSSOP PackagePurePath Digital Is a trademark of Texas InstrumentsAll other trademarks are the property of their respective ownersAudio Input/OutputAutomatic Master Clock Rate and Data Sample Rate DetectionFour Serial Audio Inputs (Eight Channels)Support for 32-, 44.1-, 48-, 88.2-, 96-, 176.4-, and 192-kHz Sampling RatesData Formats: 16-, 20-, or 24-Bit Input Data; Left-Justified, Right-Justified, and I2S64- or 48-fSBit-Clock Rate128-, 192-, 256-, 384-, and 512-fSMaster Clock Rates (Up to a Maximum of 50 MHz)Six PWM Audio Output ChannelsAny Output Channel Can be Mapped to Any Output PinSupports Single-Ended and Bridge-Tied LoadsI2S Serial Audio OutputAudio ProcessingVolume Control Range of 48 dB to -100 dBMaster Volume Control from 24 dB to -100 dB in 0.5-dB IncrementsSix Individual Channel Volume Controls With 24-dB to -100-dB Attenuation in 0.5-dB IncrementsSerial Output Can Be Produced by Downmix of 5.1-Channel Input or Fourth Serial Input5.1-Channel Downmix to 2.1 or 3.1 PWM Output Speaker SystemIntegrated Bass ManagementTwo Programmable Biquads in Subwoofer ChannelFull Six-Channel Input and Output MappingSelectable DC Blocking FiltersPWM Processing8× Oversampling With Fourth-Order Noise Shaping at 44.1, 48 kHz; 4× Oversampling at 88.2, 96 kHz; 2× Oversampling at 176.4, 192 kHz; and 12× Oversampling at 32 kHz≥105-dB Dynamic Range (TAS5086+TAS5186)THD < 0.06% (TAS5086 Only)20-Hz—20-kHz Flat Noise Floor for 44.1-, 48-, 88.2-, 96-, 176.4- and 192-kHz Data RatesDigital De-Emphasis for 32-kHz, 44.1-kHz and 48-kHz Data RatesIntelligent AM Interference Avoidance System Provides Clear AM ReceptionOptimized PWM Sequence for Click- and Popless Start and StopOptimized PWM Sequence for Charging of AC-Coupling Capacitors in Single-Ended ConfigurationsAdjustable Modulation Limit From 93.8% to 99.2%General FeaturesAutomated Operation With Easy-to-Use Control InterfaceI2C Serial Control Slave InterfaceControl Interface Operational Without MCLKSingle 3.3-V Power Supply38-Pin TSSOP PackagePurePath Digital Is a trademark of Texas InstrumentsAll other trademarks are the property of their respective owners

Description

AI
The TAS5086 is a six-channel digital pulse-width modulator (PWM) that provides both advanced performance and a high level of system integration. The TAS5086 is designed to interface seamlessly with most audio digital signal processors and MPEG decoders, accepting a wide range of input data and clock formats. The TAS5086 drives six channels of speakers in either single-ended or bridge-tied load configurations that accept a 1N + 1 interface format. The TAS5086 also supports 2N + 1 power stages with the use of some external logic (e.g., TAS5112). Stereo line out in I2S format is available with either a pass-through signal (SDIN4) or an internal downmix. The TAS5086 uses AD modulation operating at a 384-kHz switching rate for 32-, 44.1-, 48-, 88.2-, 96-, 176.4-, and 192-kHz data. The 8× oversampling, combined with the 4th-order noise shaper, provides a broad, flat noise floor and excellent dynamic range from 20 Hz to 20 kHz. The TAS5086 is only an I2C slave device, which always receives MCLK, SCLK, and LRCLK from other system components. The TAS5086 accepts clock rates of 128, 192, 256, 384, and 512 fS. The TAS5086 accepts a 64-fSmaster clock for 176.4-kHz and 192-kHz data. The TAS5086 accepts a 64-fSbit clock for all data rates. The TAS5086 also can accept a 48-fSSCLK rate for MCLK ratios of 192 fSand 384 fS. The TAS5086 is composed of five functional blocks. For detailed application information, see theUsing the PurePath Digital PWM Processorapplication report (SLEA046). The TAS5086 is a six-channel digital pulse-width modulator (PWM) that provides both advanced performance and a high level of system integration. The TAS5086 is designed to interface seamlessly with most audio digital signal processors and MPEG decoders, accepting a wide range of input data and clock formats. The TAS5086 drives six channels of speakers in either single-ended or bridge-tied load configurations that accept a 1N + 1 interface format. The TAS5086 also supports 2N + 1 power stages with the use of some external logic (e.g., TAS5112). Stereo line out in I2S format is available with either a pass-through signal (SDIN4) or an internal downmix. The TAS5086 uses AD modulation operating at a 384-kHz switching rate for 32-, 44.1-, 48-, 88.2-, 96-, 176.4-, and 192-kHz data. The 8× oversampling, combined with the 4th-order noise shaper, provides a broad, flat noise floor and excellent dynamic range from 20 Hz to 20 kHz. The TAS5086 is only an I2C slave device, which always receives MCLK, SCLK, and LRCLK from other system components. The TAS5086 accepts clock rates of 128, 192, 256, 384, and 512 fS. The TAS5086 accepts a 64-fSmaster clock for 176.4-kHz and 192-kHz data. The TAS5086 accepts a 64-fSbit clock for all data rates. The TAS5086 also can accept a 48-fSSCLK rate for MCLK ratios of 192 fSand 384 fS. The TAS5086 is composed of five functional blocks. For detailed application information, see theUsing the PurePath Digital PWM Processorapplication report (SLEA046).