CD4572UB Series

CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate)

Catalog

CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate)

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Mounting Type	Number of Inputs	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Logic Type	Output Type	Number of Circuits	Operating Temperature [Min]	Operating Temperature [Max]	Package / Case [x]	Package / Case	Package / Case [y]	Package / Case	Package / Case
Texas Instruments CD4572UBPWRE4	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-TSSOP	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.173 in	16-TSSOP	4.4 mm
Texas Instruments CD4572UBM96	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-SOIC	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.154 in	16-SOIC	3.9 mm
Texas Instruments CD4572UBE	18 V	3 V	Through Hole	8	6.8 mA	6.8 mA	16-PDIP	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C		16-DIP		0.3 in	7.62 mm
Texas Instruments CD4572UBM96E4	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-SOIC	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.154 in	16-SOIC	3.9 mm
Texas Instruments CD4572UBNSR	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-SO	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C		16-SOIC		0.209 "	5.3 mm
Texas Instruments CD4572UBMTE4	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-SOIC	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.154 in	16-SOIC	3.9 mm
Texas Instruments CD4572UBMT	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-SOIC	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.154 in	16-SOIC	3.9 mm
Texas Instruments CD4572UBPW	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-TSSOP	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.173 in	16-TSSOP	4.4 mm
Texas Instruments CD4572UBPWG4	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-TSSOP	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.173 in	16-TSSOP	4.4 mm
Texas Instruments CD4572UBM96G4	18 V	3 V	Surface Mount	8	6.8 mA	6.8 mA	16-SOIC	INVERT Gate NAND NOR	Differential	6	-55 °C	125 °C	0.154 in	16-SOIC	3.9 mm

Catalog

CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate)

Key Features

• Pin 7 NOR input positioned adjacent to VSSfor easy use of gate as an inverterPin 15 NAND input positioned adjacent to VDDfor easy use of gate as an inverterStandard symmetrical output characteristics100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range:100 nA at 18 V and 25°C5-V, 10-V, and 15-V parametric ratingsMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"Pin 7 NOR input positioned adjacent to VSSfor easy use of gate as an inverterPin 15 NAND input positioned adjacent to VDDfor easy use of gate as an inverterStandard symmetrical output characteristics100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range:100 nA at 18 V and 25°C5-V, 10-V, and 15-V parametric ratingsMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

Description

CD4572UB Hex Gate provides the system designer with direct implementation of inverter, NAND, and NOR functions and supplements the existing family of CMOS gates. The CD4572UB devices meet all requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices." The CD4572UB types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). CD4572UB Hex Gate provides the system designer with direct implementation of inverter, NAND, and NOR functions and supplements the existing family of CMOS gates. The CD4572UB devices meet all requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices." The CD4572UB types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).