NDS332P Series

P-Channel Logic Level Enhancement Mode Field Effect Transistor -20V, -1A, 0.41Ω

Catalog

P-Channel Logic Level Enhancement Mode Field Effect Transistor -20V, -1A, 0.41Ω

Part	Gate Charge (Qg) (Max) @ Vgs	Supplier Device Package	Vgs(th) (Max) @ Id	Operating Temperature [Min]	Operating Temperature [Max]	Rds On (Max) @ Id, Vgs	Mounting Type	Input Capacitance (Ciss) (Max) @ Vds	Current - Continuous Drain (Id) @ 25°C	Power Dissipation (Max) [Max]	Technology	Vgs (Max)	Drain to Source Voltage (Vdss)	Package / Case	FET Type	Drive Voltage (Max Rds On, Min Rds On) [Min]	Drive Voltage (Max Rds On, Min Rds On) [Max]
ON Semiconductor NDS332P	5 nC	SOT-23-3	1 V	-55 °C	150 °C	300 mOhm	Surface Mount	195 pF	1 A	500 mW	MOSFET (Metal Oxide)	8 V	20 V	SC-59 SOT-23-3 TO-236-3	P-Channel	4.5 V	2.7 V

Catalog

P-Channel Logic Level Enhancement Mode Field Effect Transistor -20V, -1A, 0.41Ω

Key Features

-1 A, -20 VRDS(ON)= 0.41Ω @ VGS= -2.7 VRDS(ON)= 0.3 Ω @ VGS= -4.5 V

• Very low level gate drive requirements allowing direct operation in 3V circuitsVGS(th)< 1.0V

• Proprietary package design using copper lead frame for superior thermal and electrical capabilities

• High density cell design for extremely low RDS(ON)

• Exceptional on-resistance and maximum DC current capability

• Compact industry standard SOT-23 surface Mount package

Description

These P-Channel logic level enhancement mode power field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package.