
Catalog
Phase-locked loop
Key Features
• VCO (Voltage-Controlled Oscillator):Complete Oscillator Using Only One External Bias Resistor (RBIAS)Lock Frequency:30 MHz to 55 MHz (VDD = 3 V ±5%, TA= -20°C to 75°C, x1 Output)30 MHz to 60 MHz (VDD = 3.3 V ±5%, TA= -20°C to 75°C, x1 Output)43 MHz to 110 MHz (VDD = 5 V ±5%, TA= -20°C to 75°C, x1 Output)Selectable Output FrequencyPFD (Phase Frequency Detector): High Speed, Edge-Triggered Detector with Internal Charge PumpIndependent VCO, PFD Power-Down ModeThin Small-Outline Package (14 Terminal)CMOS TechnologyPin Compatible TLC2933IPWVCO (Voltage-Controlled Oscillator):Complete Oscillator Using Only One External Bias Resistor (RBIAS)Lock Frequency:30 MHz to 55 MHz (VDD = 3 V ±5%, TA= -20°C to 75°C, x1 Output)30 MHz to 60 MHz (VDD = 3.3 V ±5%, TA= -20°C to 75°C, x1 Output)43 MHz to 110 MHz (VDD = 5 V ±5%, TA= -20°C to 75°C, x1 Output)Selectable Output FrequencyPFD (Phase Frequency Detector): High Speed, Edge-Triggered Detector with Internal Charge PumpIndependent VCO, PFD Power-Down ModeThin Small-Outline Package (14 Terminal)CMOS TechnologyPin Compatible TLC2933IPW
Description
AI
The TLC2933A is designed for phase-locked loop (PLL) systems and is composed of a voltage-controlled oscillator (VCO) and an edge-triggered type phase frequency detector (PFD). The oscillation frequency range of the VCO is set by an external bias resistor (RBIAS). The VCO has a 1/2 frequency divider at the output stage. The high speed PFD with internal charge pump detects the phase difference between the reference frequency input and signal frequency input from the external counter. Both the VCO and the PFD have inhibit functions, which can be used as power-down mode. Due to the TLC2933A high speed and stable oscillation capability, the TLC2933A is suitable for use as a high-performance PLL.
The TLC2933A is designed for phase-locked loop (PLL) systems and is composed of a voltage-controlled oscillator (VCO) and an edge-triggered type phase frequency detector (PFD). The oscillation frequency range of the VCO is set by an external bias resistor (RBIAS). The VCO has a 1/2 frequency divider at the output stage. The high speed PFD with internal charge pump detects the phase difference between the reference frequency input and signal frequency input from the external counter. Both the VCO and the PFD have inhibit functions, which can be used as power-down mode. Due to the TLC2933A high speed and stable oscillation capability, the TLC2933A is suitable for use as a high-performance PLL.