TCA9517-Q1 Series

Automotive 2-bit level-translating 400-kHz I2C/SMBus buffer/repeater with powered-off high-impedance

Catalog

Automotive 2-bit level-translating 400-kHz I2C/SMBus buffer/repeater with powered-off high-impedance

Part	Translator Type	Voltage - VCCB [Max]	Voltage - VCCB [Min]	Package / Case	Package / Case [custom]	Package / Case	Mounting Type	Number of Circuits	Output Type	Voltage - VCCA [Max]	Voltage - VCCA [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Channels per Circuit	Channel Type	Package / Case [y]	Package / Case [x]	Supplier Device Package	Grade	Qualification
Texas Instruments TCA9517ADGKR	Voltage Level	5.5 V	2.7 V	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	1	Open Drain	5.5 V	0.9 V	85 °C	-40 °C	2	Bidirectional
Texas Instruments TCA9517DGKR	Voltage Level	5.5 V	2.7 V	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	1	Open Drain	5.5 V	0.9 V	85 °C	-40 °C	2	Bidirectional
Texas Instruments TCA9517DR	Voltage Level	5.5 V	2.7 V	8-SOIC			Surface Mount	1	Open Drain	5.5 V	0.9 V	85 °C	-40 °C	2	Bidirectional	3.9 mm	0.154 in	8-SOIC
Texas Instruments TCA9517DGKRQ1	Voltage Level	5.25 V	2.7 V	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	1	Open Drain	5.25 V	0.9 V	125 °C	-40 °C	2	Bidirectional				Automotive	AEC-Q100

Catalog

Automotive 2-bit level-translating 400-kHz I2C/SMBus buffer/repeater with powered-off high-impedance

Key Features

• AEC-Q100 Qualified for automotive applicationsDevice temperature: –40°C to 125°C TADevice HBM classification Level: ±5500-VDevice CDM classification Level: ±1000-VFunctional Safety-CapableDocumentation available to aid functional safety system designTwo-channel bidirectional bufferI2C Bus and SMBus compatibleOperating Supply Voltage Range of 0.9-V to 5.25-V on A-sideOperating supply voltage range of 2.7-V to 5.25-V on B-sideVoltage-level translation from 0.9-V to 5.25-V and 2.7-V to 5.25-VActive-high repeater-enable inputOpen-drain I2C I/O5.25-V tolerant I2C and enable input support mixed-mode signal operationAccommodates standard mode and fast mode I2C devices and multiple controllerHigh-impedance I2C pins when powered-offLatch-up performance exceeds 100 mA Per JESD 78, class IIAEC-Q100 Qualified for automotive applicationsDevice temperature: –40°C to 125°C TADevice HBM classification Level: ±5500-VDevice CDM classification Level: ±1000-VFunctional Safety-CapableDocumentation available to aid functional safety system designTwo-channel bidirectional bufferI2C Bus and SMBus compatibleOperating Supply Voltage Range of 0.9-V to 5.25-V on A-sideOperating supply voltage range of 2.7-V to 5.25-V on B-sideVoltage-level translation from 0.9-V to 5.25-V and 2.7-V to 5.25-VActive-high repeater-enable inputOpen-drain I2C I/O5.25-V tolerant I2C and enable input support mixed-mode signal operationAccommodates standard mode and fast mode I2C devices and multiple controllerHigh-impedance I2C pins when powered-offLatch-up performance exceeds 100 mA Per JESD 78, class II

Description

The TCA9517A is a bidirectional buffer with level shifting capabilities for I2C and SMBus systems. It provides bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9V) and higher voltages (2.7V to 5.5V) in mixed-mode applications. This device enables I2C and SMBus systems to be extended without degradation of performance, even during level shifting. The TCA9517A buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing two buses of up to 400pF bus capacitance to be connected in an I2C application. The TCA9517A has two types of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over-voltage tolerant to 5.5V, even when the device is unpowered (VCCB and/or VCCA = 0V). The TCA9517A offers a higher contention level threshold, VILC, than the TCA9517, which allows connections to slaves which have weaker pulldown ability. The type of buffer design on the B-side prevents it from being used in series with devices which use static voltage offset. This is because these devices do not recognize buffered low signals as a valid low and do not propagate it as a buffered low again. The B-side drivers operate from 2.7 V to 5.5 V. The output low level for this internal buffer is approximately 0.5 V, but the input voltage must be 70 mV or more below the output low level when the output internally is driven low. The higher-voltage low signal is called a buffered low. When the B-side I/O is driven low internally, the low is not recognized as a low by the input. This feature prevents a lockup condition from occurring when the input low condition is released. The TCA9517A is a bidirectional buffer with level shifting capabilities for I2C and SMBus systems. It provides bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9V) and higher voltages (2.7V to 5.5V) in mixed-mode applications. This device enables I2C and SMBus systems to be extended without degradation of performance, even during level shifting. The TCA9517A buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing two buses of up to 400pF bus capacitance to be connected in an I2C application. The TCA9517A has two types of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over-voltage tolerant to 5.5V, even when the device is unpowered (VCCB and/or VCCA = 0V). The TCA9517A offers a higher contention level threshold, VILC, than the TCA9517, which allows connections to slaves which have weaker pulldown ability. The type of buffer design on the B-side prevents it from being used in series with devices which use static voltage offset. This is because these devices do not recognize buffered low signals as a valid low and do not propagate it as a buffered low again. The B-side drivers operate from 2.7 V to 5.5 V. The output low level for this internal buffer is approximately 0.5 V, but the input voltage must be 70 mV or more below the output low level when the output internally is driven low. The higher-voltage low signal is called a buffered low. When the B-side I/O is driven low internally, the low is not recognized as a low by the input. This feature prevents a lockup condition from occurring when the input low condition is released.