74AUP1G00GZ Series

Low-power 2-input NAND gate

Catalog

Low-power 2-input NAND gate

Part	Logic Type	Supplier Device Package [y]	Supplier Device Package [x]	Supplier Device Package	Input Logic Level - High [Max]	Input Logic Level - High [Min]	Number of Inputs	Number of Circuits	Package / Case	Current - Quiescent (Max) [Max]	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL
Nexperia USA Inc. 74AUP1G00GZYL	NAND Gate	0.85	1.1	5-XSON	2 V	1.6 V	2	1	4-XDFN Exposed Pad	500 nA	0.8 V	3.6 V	Surface Mount Wettable Flank	4 mA	4 mA	125 °C	-40 C	6.5 ns

Catalog

Low-power 2-input NAND gate

Description

The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the damaging backflow current through the device when it is powered down.